1. Field of the Invention
The present invention relates to differential amplifiers, and in particular, to differential amplifiers operating in a low power circuit environment.
2. Description of the Related Art
Referring to FIGS. 1A and 1B, switched capacitor circuits are well known in the art. Such circuits can be used to provide various signal filtering or integration functions and typically have two phases, or states, of operation: a sample phase Oa and a holding phase 10b. As is well known in the art, switches (not shown) driven by nonoverlapping clock signal phases (not shown) cause input and feedback capacitances coupled to the input terminals 11a, 11b of the differential amplifier 12, to switch between reception of the positive Vinp and negative Vinn phases of the differential input signal Vin, and circuit ground GND, thereby feeding back the positive Voutp 13a and negative Voutn 13b signal phases of the output signal Vout. Load capacitances Cload couple the output signal terminals 13a, 13b, to circuit ground GND.
As is further well known, modern complementary metal oxide semiconductor (CMOS) processes are continuing to scale down in terms of power supply voltage magnitudes. Indeed, some circuits are now expected to operate at power supply voltages at or below one volt. Particularly for the amplifier 12 in a switched capacitor circuit, such low power supply voltages result in lost headroom for the analog amplifier circuitry.
Referring to FIG. 2, a typical implementation of the differential amplifier 12 includes two circuit branches 12a, 12b formed by the serial connections of transistors M2 and M4 and transistors M1 and M3, powered by a power supply voltage VDD and driven by a tail current source 14, which together produce a total amplifier bias current of 2*Islew. When used in the switched capacitor circuit 10, the overall circuitry has one pole at a dominant pole position, and a feedback factor associated with the switched capacitors C. (It should be understood that this simplified analysis ignores the input capacitance of the differential amplifier circuit 12.)
At low power supply VDD voltages, it is difficult to maintain the transistors M1, M2, M3, M4 of the amplifier 12 in their respective operational states of saturation. This difficulty increases significantly when cascode devices are added to the P-MOS and N-MOS portions of the circuit 12. Accordingly, high DC gain cannot be achieved. Moreover, simply increasing the power supply voltage VDD to improve headroom will significantly increase power dissipation of the circuit 12.
Referring to FIG. 3, the aforementioned dominant pole causes the open loop gain bandwidth product GBWxe2x80x2 for the amplifier 12 to be a function of the transconductance gm of the input transistors M1, M2 and the switched and load Cload capacitances. The feedback factor f, which is equal to 0.5 for equal valued switched capacitances C, affects the closed loop gain bandwidth product GBW accordingly (GBW=GBWxe2x80x2*f).
In accordance with the presently claimed invention, a low power differential amplifier is powered by a plurality of unequal power supply voltages. The input stage operates at a higher power supply voltage so as to maintain its transistors in operational states of saturation while providing a sufficient dynamic signal voltage range. The output stage operates at a lower power supply voltage while providing a sufficient dynamic signal current range.
In accordance with one embodiment of the presently claimed invention, a low power differential amplifier powered by a plurality of unequal power supply voltages includes power supply terminals, telescopic differential amplifier circuitry and voltage follower circuitry. A first power supply terminal conveys a first power supply voltage having a first voltage magnitude. A second power supply terminal conveys a second power supply voltage having a second voltage magnitude which is less than the first voltage magnitude. The telescopic differential amplifier circuitry, coupled to the first power supply terminal, responds to reception of the first power supply voltage and an input differential signal by providing an intermediate differential signal corresponding to the input differential signal. The voltage follower circuitry, coupled to the second power supply terminal and the telescopic differential amplifier circuitry, responds to reception of the second power supply voltage and the intermediate differential signal by providing an output differential signal corresponding to the intermediate differential signal.
In accordance with another embodiment of the presently claimed invention, a low power differential amplifier powered by a plurality of unequal power supply voltages includes power means, differential amplifier means and voltage follower means. A first power means is for conveying a first power supply voltage having a first voltage magnitude. A second power means is for conveying a second power supply voltage having a second voltage magnitude which is less than the first voltage magnitude. The differential amplifier means is for receiving the first power supply voltage and an input differential signal and responding thereto by generating an intermediate differential signal corresponding to the input differential signal. The voltage follower means is for receiving the second power supply voltage and the intermediate differential signal and responding thereto by generating an output differential signal corresponding to the intermediate differential signal.
In accordance with still another embodiment of the presently claimed invention, a low power differential amplifier powered by a plurality of unequal power supply voltages includes power supply terminals and amplifier circuitries. A first power supply terminal conveys a first power supply voltage having a first voltage magnitude and a first power supply current having a first current magnitude. A second power supply terminal conveys a second power supply voltage having a second voltage magnitude and a second power supply current having a second current magnitude, wherein the first voltage magnitude is greater than the second voltage magnitude and the first current magnitude is less than the second current magnitude. First amplifier circuitry, coupled to the first power supply terminal, responds to reception of the first power supply voltage, the first power supply current and an input differential signal by providing an intermediate differential signal corresponding to the input differential signal. Second amplifier circuitry, coupled to the second power supply terminal and the first amplifier circuitry, responds to reception of the second power supply voltage, the second power supply current and the intermediate differential signal by providing an output differential signal corresponding to the intermediate differential signal.
In accordance with yet another embodiment of the presently claimed invention, a low power differential amplifier powered by a plurality of unequal power supply voltages includes power means and amplifier means. A first power means is for conveying a first power supply voltage having a first voltage magnitude and a first power supply current having a first current magnitude. A second power means is for conveying a second power supply voltage having a second voltage magnitude and a second power supply current having a second current magnitude, wherein the first voltage magnitude is greater than the second voltage magnitude and the first current magnitude is less than the second current magnitude. A first amplifier means is for receiving the first power supply voltage, the first power supply current and an input differential signal and responding thereto by generating an intermediate differential signal corresponding to the input differential signal.
A second amplifier means is for receiving the second power supply voltage, the second power supply current and the intermediate differential signal and responding thereto by generating an output differential signal corresponding to the intermediate differential signal.